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AD7262: 1 MSPS, 12-Bit, Simultaneous Sampling SAR ADC with PGA and Four Comparators Data Sheet0 pages
FEATURES
FUNCTIONAL BLOCK DIAGRAM
Dual simultaneous sampling 12-bit, 2-channel analog-todigital converter (ADC)
True differential analog inputs
Programmable gain stage: ×1, ×2, ×3, ×4, ×6, ×8, ×12, ×16,
×24, ×32, ×48, ×64, ×96, ×128
Throughput rate per ADC
1 MSPS for AD7262
500 kSPS for AD7262-5
Analog input impedance: >1 GΩ
Wide input bandwidth
−3 dB bandwidth: 1.7 MHz at gain = 2
4 on-chip comparators
SNR: 73 dB typical at gain = 2, 66 dB typical at gain = 32
Device offset calibration, system gain calibration
On-chip reference: 2.5 V
−40°C to +105°C operation
High speed serial interface
SPI/QSPI™/MICROWIRE/DSP compatible
48-lead LFCSP and LQFP
VREF A
AVCC
REF
VA +
VA –
PGA
VB +
VB –
PGA
Rev. A
OUTPUT
DRIVERS
BUF
DOUTA
DOUTB
PD0/DIN
PD1
PD2
VREFB
CA_CBVCC
CA–
The AD7262/AD7262-5 are ideally suited for monitoring small
amplitude signals from a variety of sensors. They include all the
functionality needed for monitoring the position feedback signals
from a variety of analog encoders used in motor control systems.
OUTPUT
DRIVERS
SCLK
CAL
CS
REFSEL
G0
G1
G2
G3
VDRIVE
12-BIT
SUCCESSIVE
APPROXIMATION
ADC
T/H
CA+
The AD7262/AD7262-5 contain four comparators. Comparator A
and Comparator B are optimized for low power, while Comparator C and Comparator D have fast propagation delays. The
AD7262/AD7262-5 feature a calibration function to remove any
device offset error and programmable gain adjust registers to allow
for input path (for example, sensor) offset and gain compensation.
The AD7262/AD7262-5 have an on-chip 2.5 V reference that
can be disabled if an external reference is preferred.
12-BIT
SUCCESSIVE
APPROXIMATION
ADC
T/H
CONTROL
LOGIC
GENERAL DESCRIPTION
The AD7262/AD7262-5 are dual, 12-bit, high speed, low power,
successive approximation ADCs that operate from a single 5 V
power supply. The AD7262 features throughput rates of up to
1 MSPS per on-chip ADC. The AD7262-5 features throughput
rates of up to 500 kSPS. Two complete ADC functions allow
simultaneous sampling and conversion of two channels. Each
ADC is preceded by a true differential analog input with a PGA.
There are 14 gain settings available: ×1, ×2, ×3, ×4, ×6, ×8, ×12,
×16, ×24, ×32, ×48, ×64, ×96, and ×128.
AD7262
BUF
COMP
OUTPUT
DRIVERS
CB+
CB–
CA_CB_GND
COMP
CC_CDVCC
CC+
CC–
CD+
CD–
CC_CD_GND
COMP
COUTA
OUTPUT
DRIVERS
OUTPUT
DRIVERS
COMP
AGND
COUTB
COUTC
OUTPUT
DRIVERS
COUTD
DGND
Figure 1.
PRODUCT HIGHLIGHTS
1.
2.
3.
4.
Integrated PGA with a variety of flexible gain settings to
allow detection and conversion of low level analog signals.
Each PGA is followed by a dual simultaneous sampling
ADC, featuring throughput rates of 1 MSPS per ADC for
the AD7262. The conversion results of both ADCs are
simultaneously available on separate data lines or in succession on one data line if only one serial port is available.
Four integrated comparators that can be used to count
signals from pole sensors in motor control applications.
Internal 2.5 V reference.
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Data Sheet
1 MSPS, 12-Bit, Simultaneous Sampling
SAR ADC with PGA and Four Comparators
AD7262
